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Von Mises stress for lattice mismatch between epilayer and substrate

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I simulated a Germanium epilayer on Silicon substrate structure for Von Mises stress. The thickness of the substrate was 10 times that of the epilayer. I incorporated the lattice mismatch induced strain in the thermal expansion vector. The Von Mises stress in the bulk of the substrate is expected to be zero and approximately 1 GPa at the interface.

The Slice Von Mises stress plot gives me a minimum value of 1e8 Pa in the bulk of the substrate. The maximum value of stress is however correct. The scale of the plot is uniform 1 GPa, 2 GPa and so on. The only problem is the minimum value displayed.

2 Replies Last Post 21 mar 2016, 06:21 GMT-4
Ivar KJELBERG COMSOL Multiphysics(r) fan, retired, former "Senior Expert" at CSEM SA (CH)

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Posted: 2 decades ago 18 nov 2009, 16:55 GMT-5
Hi

It's not easy for us to get a full idea of the issues just with your explanations, as variations on stress can come from many causes.
I beleive you have a fixed geometry and you heat it up ? In which case you have to ensure that your boundary conditions are not articifially fixing the volume such that the stress is also influenced artificially.

On simple trick is to set all material to the same (default steel) and add 100K as expansion temperature, normally if the boundary conditions allow free thermal expansion you should see no stress build-up, if not you are overconstrained.

If your model passes this test, you remain with how to check and verify your interface thermal expansion mismatch, for this I do not have any suggestions as I do not know how you have done it.

Good luck
Ivar
Hi It's not easy for us to get a full idea of the issues just with your explanations, as variations on stress can come from many causes. I beleive you have a fixed geometry and you heat it up ? In which case you have to ensure that your boundary conditions are not articifially fixing the volume such that the stress is also influenced artificially. On simple trick is to set all material to the same (default steel) and add 100K as expansion temperature, normally if the boundary conditions allow free thermal expansion you should see no stress build-up, if not you are overconstrained. If your model passes this test, you remain with how to check and verify your interface thermal expansion mismatch, for this I do not have any suggestions as I do not know how you have done it. Good luck Ivar

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Posted: 9 years ago 21 mar 2016, 06:21 GMT-4
Hello!

May I ask you a question? I want to simulate the stress/strain which is caused by lattice mismatch,

but I don't konw how to set the lattice constants of the materials. I have read the guide books about

semiconductors, but still can't find the solution. Do you konw how to set lattice constants?

Thank you so much!
Hello! May I ask you a question? I want to simulate the stress/strain which is caused by lattice mismatch, but I don't konw how to set the lattice constants of the materials. I have read the guide books about semiconductors, but still can't find the solution. Do you konw how to set lattice constants? Thank you so much!

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