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SOI CMOS-based Transistor Model for Low Power Wireless Sensor Network
Published in 2015
Wireless sensor network has been extensively applied in a wide variety of areas such as defense, agriculture, transportation, etc. The major challenge in those networks is the finite energy of the sensor node which is by and large engaged in transmitting and receiving data. It is known that substantial amount of energy is consumed in transmitter portion. The constituent unit of the transmitter i.e., LNA consumes the bulk of power.
In this piece of work, we have addressed this issue with the use of SOI CMOS rather than the traditional CMOS. It has been reported in the literature that SOI CMOS based circuits consumes low power and have low junction capacitance. This in turn enhances the switching speed of the sensor node.
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- panigrahi_poster.pdf - 0.52MB
- panigrahi_paper.pdf - 0.48MB
- panigrahi_abstract.pdf - 0.08MB